EDRA Project


PnevmatikatosProf. Dionisios N. Pnevmatikatos is a Professor at the School of Electrical and Computer Engineering, National Technical University of Athens, and a research associate with ICCS. He received his PhD in Computer Science in 1995 from the University of Wisconsin–Madison. He has participated as a coordinator in FASTER FP7 EU and EDRA H2020 projects, and as a Principal Investigator in the AXIOM, dRedBox, and EXTRA H2020 and DeSyRe FP7 projects, as well as for several national projects. His research interests include Computer Architecture, with a focus on using reconfigurable computing to create highly efficient, accelerated, heterogeneous parallel/rack-scale systems. He has also worked on Reliable System Design, Networking Hardware and Network Processors, Application Acceleration, Custom and Application-Specific Architectures, and Hardware Acceleration of Bioinformatics Algorithms. He has been in the Technical Program Committee of conferences such as ISCA, FPL and DATE in Computer Architecture and Reconfigurable System topics, and has been a Program (co)chair for SAMOS 2018 and FPL 2011.

TheodoropoulosDr. Dimitris Theodoropoulos is a post-doc researcher affiliated with the Telecommunication Systems Research Institute at the Technical University of Crete. In 2003 and 2006 he obtained his Diploma (5-year degree) and M.Sc degree respectively from the Electronic and Computer Engineering department at the Technical University of Crete, Greece. In 2007, he joined the Computer Engineering department of the Delft University of Technology, the Netherlands, where he worked towards his PhD. Dimitris Theodoropoulos is / has been involved at technical and management level in the following research projects: EDRA H2020 FET Innovation Launchpad (#851631), REMAP Tetramax-founded project, dRedBox H2020 project (#687632), AXIOM H2020 project (#645496), DeSyRe FP7 project (#287611). His current research interests include: embedded systems, IoT / cloud computing and reconfigurable computing.

AlachiotisDr. Nikolaos Alachiotis completed his undergraduate studies at the ECE department of the Technical University of Crete (Greece) and his Ph.D. at the Informatics department of the Technische  Universitat Munchen (Germany) in 2008 and 2012, respectively. His research interests lie in the fields of computer architecture, parallel computing, reconfigurable computing, and Bioinformatics. He joined the Computer Architecture Lab at Carnegie Mellon University as a post-doctoral researcher in 2014, where he led the design of a generic acceleration architecture for 3D-stacked DRAMs (DARPA-funded PERFECT project). He joined the Computer Architecture and VLSI Systems Laboratory at FORTH-ICS in September 2016, where he worked on architecture design and hardware development for  enabling specialized acceleration in disaggregated datacenters (EU-funded dReDBox project). As of June 2019, he is with the Telecommunications Systems Research Institute, working on automated generation of hardware-accelerated software for deployment on the cloud (EU-funded EDRA project).

corporate_brokalakisAndreas Brokalakis is currently pursuing a PhD degree at the Technical University of Crete, working on computer architecture and high-speed interconnects for multiprocessor heterogeneous systems with reconfigurable accelerators. He is a graduate of the Computer Engineering and Informatics Department, University of Patras and holds a Master’s title form the same university on “Integrated Hardware/Software Systems”. His main research interests include processor architectures, high-speed memories and memory coherency protocols for multiprocessors, hardware accelerators, reconfigurable systems and computer arithmetic for low-power and HPC systems. During the past ten years he has been actively involved in numerous European (FP7 and H2020) and national research projects both in research and systems development positions. Currently he has 23 publications in several international conferences and journals, while he has served as a member of the technical program committee and reviewer in a series of conferences and journals, including IEEE Transactions on Computers, IEEE Transactions on Parallel and Distributed Systems, IEEE International Symposium on Circuits and Systems (ISCAS), International Conference on Field Programmable Logic (FPL) and others.