The FET project EXTRA (Exploiting eXascale Technology with Reconfigurable Architectures) focused on devising efficient ways to deploy ultra-efficient heterogeneous compute nodes in order to meet the massive performance requirements of future exascale High Performance Computing (HPC) applications. A major outcome was the design and the implementation of a novel framework that maps applications on reconfigurable hardware, employing Decoupled Access Execution Reconfigurable (DAER) architecture for HPC platforms, originally based on the idea of Decoupled Access – Execute architectures.
During the EXTRA project, various algorithmic workloads were mapped to reconfigurable HPC platforms using the DAE approach, achieving significant performance improvements in spite of different memory access patterns and/or computational requirements. However, currently there are two main obstacles for making the EXTRA results available and easily accessible to the market:
- Launching applications onto the EXTRA hardware is currently based on a semi-automatic tool flow, requiring developers to manually separate memory accesses from data-computation tasks;
- FPGA-based acceleration requires the additional inherent cost of specialized hardware.
Τhe EDRA framework will tackle both the aforementioned drawbacks by providing:
- A fully-automated software workflow, which will automatically generate DAE-compatible application executables, requiring only minor code-annotation with certain directives;
- An integration of the EDRA workflow with Amazon’s software library for taking advantage of the available reconfigurable hardware;
- A full Amazon Machine Image (AMI) that integrates the complete stack with the EXTRA DAE architecture, ready for deployment on the AWS F1 instance type machines.